Computer Arithmetic
computer arithmetic books:
Omondi, "Computer Arithmetic Systems
Israel Koren,
Computer Arithmetic Algorithms
some references:
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Adders, 2's-Complement adders, etc:
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Books: Koren, Omondi
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Mueller and Paul, "The Complexity of Simple Computer Architectures"
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Parallel Prefix Computation
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Ladner and Fischer, "Parallel Prefix Computation", JACM, Vol 27, pp. 831-838,
Oct., 1980.
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F. Thomson Leighton, "Introduction to Parallel Algorithms and Architectures:
Arrays, Trees, Hypercubes", 1992.
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Brent and Kung, "A regular Layout for Parallel Adders", IEEE trans. Computers,
Vol C-31, No. 3, March 1982, pp. 260-264.
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Wei and Thomborson, "Area-Time Optimal Designs", IEEE trans. Computers,
Vol 39, No. 5, May 1990.
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Booth Recoding and Multiplication
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Floating Point
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IEEE 754 Standard
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Even and Paul, "On The Design of IEEE Compliant Floating Point Units" ([143KB]
compressed postscript). To appear in IEEE Trans. on Computers.
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Mueller and Paul, excerpt from Vol 2 of "The Complexity of Simple Computer
Architectures" (compressed
postscript)
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Mueller and Paul, "The Decomposition Theorem for IEEE Floating Point Rounding"
(compressed
postscript)
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Even and Seidel, "A comparison of three rounding algorithms for IEEE
floating-point multiplication", (postscript)
to Appear in IEEE Trans. on Computers.
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Seidel and Even,"
An IEEE Floating-Point Adder Design Optimized For Speed".
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Nielsen, Matula, Lyu, Even,
An IEEE compliant floating-point adder that conforms with the
pipelined packet-forwarding paradigm
". Appeared in IEEE Trans. on Computers.
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Other related sites - partial list